Heterogeneous computing is evolving to heterogeneous multiprocessing as of today.  We are no longer satisfied with acceleration with GPU alone but looking for dynamic allocation of resources from a mix of CPU, GPU, Many-Core, and FPGA in the same system. Will this evolution be driven by hardware, software, or users?  The evolution is real as the footprints are already existent like a big bang in high performance computing.  This article provides the key observations and a proposition to move forward.

Contents
1. Proposition
2. Footprints of Big Bang
3. Real Performance
4. Real Hardware
5. Real Software
6. Summary
7. References
8. Author/Contributors

1. Proposition

SKA (Square Kilometre Array) radio telescope1 is a gigantic science project by world standard and we are designing the instruments that will tell us more about where we came from and how we got here.  The data bandwidth required to handle the vast amount of signals from the sky for the tasks is as high as 7.9TB/s for the Survey telescope alone 2 (which is one of the 3 telescope systems in SKA).  Survey will be built in the desert of Western Australia beyond the economical reach of the current power grid.  Electricity for operating Survey is going to be expensive.  These 2 factors of data bandwidth and electricity cost are high on the agenda and need a different perspective of viewing high performance computing (HPC). 

New Zealand has been selected by the international SKA organisation and Central Signal Processing consortium to lead the design of Survey HPC.  The white paper2 from the New Zealand team obtained a high vote during the selection process for a global view that New Zealand has proposed to take.  SKA central signal processing is a specific task and needs a specific solution.  It is an early sign of things to come and the New Zealand team undertakes a generic or global computing view to finding the best fit for SKA.  The Government has endorsed our presence on the world stage 3 and provided funding to our team. 

Our design team members have proposed to carry out in-depth projects to exploit the potentials of new technologies that may emerge from the efforts of our team and our close collaborators from Canada, Australia, UK, and various member countries.   One of the projects being proposed by team members has defined 20 process milestones.

2. Footprints of a Big Bang

The International Exascale Software Project 4 started in 2010 has laid out the footprint of a big bang for addressing the big data issues facing the world over the next couple of decades.  The SAVE Project 5 under EU FP7 framework offers a specific direction.  In brief it pushes the philosophy of not one technology fitting all solutions.  It proposes deploying a mix of hardware technologies including CPU, GPU, Many-Core, and FPGA in one system to address computing tasks of various personalities.  Just-in-time dynamic allocation is an obvious method and this will require memory coherence of the various types of processors in the system.  Memory coherence is not a new topic as ARM has created AXI 6 and AMD has promoted the Heterogeneous System Architecture (HSA) 7 and proceeded to release its Kaveri APU at the end of 2013 implementing unified memory access and unified queues for CPU and GPU cores on the same die.

Please email This e-mail address is being protected from spam bots, you need JavaScript enabled to view it for a copy of the paper

Heterogeneous computing is evolving to heterogeneous multiprocessing as of today.  We are no longer satisfied with acceleration with GPU alone but looking for dynamic allocation of resources from a mix of CPU, GPU, Many-Core, and FPGA in the same system. Will this evolution be driven by hardware, software, or users?  The evolution is real as the footprints are already existent like a big bang in high performance computing.  This article provides the key observations and a proposition to move forward.

Contents
1. Proposition
2. Footprints of Big Bang
3. Real Performance
4. Real Hardware
5. Real Software
6. Summary
7. References
8. Author/Contributors

1. Proposition

SKA (Square Kilometre Array) radio telescope1 is a gigantic science project by world standard and we are designing the instruments that will tell us more about where we came from and how we got here.  The data bandwidth required to handle the vast amount of signals from the sky for the tasks is as high as 7.9TB/s for the Survey telescope alone 2 (which is one of the 3 telescope systems in SKA).  Survey will be built in the desert of Western Australia beyond the economical reach of the current power grid.  Electricity for operating Survey is going to be expensive.  These 2 factors of data bandwidth and electricity cost are high on the agenda and need a different perspective of viewing high performance computing (HPC). 

New Zealand has been selected by the international SKA organisation and Central Signal Processing consortium to lead the design of Survey HPC.  The white paper2 from the New Zealand team obtained a high vote during the selection process for a global view that New Zealand has proposed to take.  SKA central signal processing is a specific task and needs a specific solution.  It is an early sign of things to come and the New Zealand team undertakes a generic or global computing view to finding the best fit for SKA.  The Government has endorsed our presence on the world stage 3 and provided funding to our team. 

Our design team members have proposed to carry out in-depth projects to exploit the potentials of new technologies that may emerge from the efforts of our team and our close collaborators from Canada, Australia, UK, and various member countries.   One of the projects being proposed by team members has defined 20 process milestones.

2. Footprints of a Big Bang

The International Exascale Software Project 4 started in 2010 has laid out the footprint of a big bang for addressing the big data issues facing the world over the next couple of decades.  The SAVE Project 5 under EU FP7 framework offers a specific direction.  In brief it pushes the philosophy of not one technology fitting all solutions.  It proposes deploying a mix of hardware technologies including CPU, GPU, Many-Core, and FPGA in one system to address computing tasks of various personalities.  Just-in-time dynamic allocation is an obvious method and this will require memory coherence of the various types of processors in the system.  Memory coherence is not a new topic as ARM has created AXI 6 and AMD has promoted the Heterogeneous System Architecture (HSA) 7 and proceeded to release its Kaveri APU at the end of 2013 implementing unified memory access and unified queues for CPU and GPU cores on the same die.

Please email This e-mail address is being protected from spam bots, you need JavaScript enabled to view it for a copy of the paper