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July 2013 |
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This note is based on observation and is not theoretical, academic or experimental. It attempts to look for patterns of change and to categorize the current situation in June 2013 for the purpose of providing clarity. This note is debatable and must be read with caution and shall not be relied on for making decisions without a direct discussion with the Compucon system architect.
The last 120 years (not 12 years) has given birth to 3 eras of computing technology- vacuum tube era, semiconductor era and the current digital IP era. Each progressively expanded computing from central organisation based to personal desktops to mobile collaboration over the Internet. The size of computing hardware has shrunk over 4 periods- the periods are mainframe, mini, micro, and mobile (SOC) where SOC stands for System-on-chip. Market behaviour has also changed over each period. Initially people chased for performance since it was scarce; then for price as computing became more commonplace; and then for power (electrical efficiency) when computing was needed all the time. None of them was disruptive on its own. Good enough has been responsible for the emergence of lower performance, lower power, and lower priced technology for mainstream adoption!
We divide computing into two categories, mainstream and niche, with a population ratio of 80/20 respectively for convenience.
o Mainstream computing users are those that use thin clients and devices that are mobile. They use cloud computing as well. At the backend cloud computing providers are large global organisations; their customer base and infrastructure spread across national boundaries. To handle the global population, these providers adopt commodity hardware and deploy software as an abstraction layer.
o We refer niche computing users to those who are not mainstream users. Supercomputing data centres are one example group. SKA is another typical example. Their approach to computing is rather different.
o Supercomputing has used the best and a lot of top of the line commercial off the shelf (COTS) hardware. Typical hardware suppliers are as IBM, Intel, Nvidia and AMD. Computational performance is the main issue for them.
o SKA Central Signal Processing is for real time streaming and processing. It is designed for specific functions and while it also involves a large quantity of hardware, COTS hardware may not be the most appropriate solution and a good balance between hardware cost and programming effort required must be achieved.
Digital is binary (zeros and ones). The real world is not. There is a continuum connecting the mainstream and niche computing categories described above.
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June 2013 |
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This article is a snapshot of the direction being taken by Compucon as of 2013-06. The direction is the same as prescribed over the last 5 years but is more refined than previously. This indicates an increase in confidence and clarity.
In technology and product terms, Compucon runs 4 teams at present. The titles of the team reflect a sharpening of focus from generic computing platforms to more purpose oriented systems.
Team 1- Computing system platforms
Team 2- Heavy data systems
Team 3- Computer vision systems
Team 4- High Performance Computing systems
o Computing platform technologies do not stand still although the development rate may have slowed down a bit. In the Wintel camp, we will see Windows 8.1 and Server 2012 R2 in Q3 timeframe and the 4th Generation Intel Core is being progressively released. Superhawk will wait for Core i3 as 15% of customers have accepted i3 in lieu of i5 or i7 for Superhawk. AMD will release 5GHz 8-core CPU in AM3+ socket. We believe it cannot compete with i7 for our Superhawk or Superhawk Plus adoption. SSD on PCIev2 is available reaching 3GB/s of read throughput. We will consider offering them to our customers in Q3 or Q4.
o We have looked into various packages implementing ZFS over the last 6 months and are comfortable with advising our peers on data volumes as large as 16 Exabytes. We will look into HDFS which is being deployed by big boys with hundreds of thousands if not millions of commodity HDD across the Internet as one system. On the hardware side, we have recently introduced 1UD12SX and DX, and 4UD72 to provide a wide range of big data options. 4U72 is hot swappable and hits 10GB/s of HDD of theoretical throughput!
o Augmented Reality (such as Google Glass) and Augmented Decision (such as Daimler Pedestrian Evasion) are in the trial stage. These technologies need computer vision and data modelling as the basis. Our joint effort with the University of Auckland on a Bachelor of Technology project is in progress and we expect to gain some insight by October timeframe. Our IPVS systems are doing well and QIPS being managed directly by Compucon has consistently exceeded customer expectation in its 5th year of operation. We expect to finish Video Analytic testing any time soon and surveillance of specific human body behaviours such as slip/fall, run/speed, loitering will be on our pricelist in July.
o Lastly our high performance computing agenda has received a big dose of stimulations from our involvement in the international SKA central signal processing feasibility study recently. The occasion allowed us to put the feasibility economies of GPU in perspective. Nevertheless our agenda on CUDA is going ahead and we are including OpenMP and OpenACC in our core competence development. We may introduce Xeon Phi this year.
PC will not go away! Smart businesses and professionals have unfinished desire for computing speed so that they can do more in lesser time and for lesser price. Supporting them is the business we are in. We call on our peers to share the journey together as we have done for the last 21 years.
END
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June 2013 |
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This article discusses the economical feasibility of applying COTS GPU to SKA1 CSP Survey. The computing requirements are obtained from the Feasibility Study White Paper dated 2013-0503. Pre-requisite training notes to read are: Amdahl Law, Arithmetic Intensity (AI), SKA, and Radio Interferometry.
Parallel Computing
o SKA Survey telescope is designed to map the sky in spectral lines and continuum. The telescope consists of 96 dishes (for seeing the same part of the sky from different locations on Earth). Each dish produces 36 beams (for seeing different parts of the sky) and each beam consists of signals in 500 consecutive channels of 1MHz width. Each MHz band will go into CSP for breaking down into 512 finer channels of 2kHz and signals of the same 2kHz frequency band from 96 dishes will be cross-correlated to produce the final visibility for SDP. The 2 processes of channelization and cross-correlation are separated by another process called cross connect. This is because signals coming out of the first process are organized in streams per beam and per dish, whereas the signals going into the second process must be organised in streams of the same frequency per beam for all dishes. Cross connect has to be achieved with data switches outside of the processor due to huge data size. As such processing has to be broken into 2 separate processors.
Channelization Processor
o The splitting into finer channels per stream of signal can be processed separately from other streams but all streams have to be coordinated. The Amdahl limit is 100% meaning that parallel computing is essential. However, the AI index of this process is very low and is about 5 FLOPS per Byte per second. Owing to the large data transfer rate, the process has to be handled by 250 GPU nodes assuming PCIev4 (31.5GB/s) is the memory transfer bottleneck and not external data transfer.
Cross Correlation Processor
o The Amdahl limit is 100% whereas the AI is 47 FLOPS per Byte per second and 219 GPU nodes are required based on PCIev4.
Nvidia Tesla Volta
o Conservatively Tesla Volta has an AI of about 280. This means both processes will not make good use of the processing capacity of Volta.
END
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June 2013 |
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This article discusses the economical feasibility of applying COTS GPU to SKA1 CSP Survey. The computing requirements are obtained from the Feasibility Study White Paper dated 2013-0503. Pre-requisite training notes to read are: Amdahl Law, Arithmetic Intensity (AI), SKA, and Radio Interferometry.
Parallel Computing
o SKA Survey telescope is designed to map the sky in spectral lines and continuum. The telescope consists of 96 dishes (for seeing the same part of the sky from different locations on Earth). Each dish produces 36 beams (for seeing different parts of the sky) and each beam consists of signals in 500 consecutive channels of 1MHz width. Each MHz band will go into CSP for breaking down into 512 finer channels of 2kHz and signals of the same 2kHz frequency band from 96 dishes will be cross-correlated to produce the final visibility for SDP. The 2 processes of channelization and cross-correlation are separated by another process called cross connect. This is because signals coming out of the first process are organized in streams per beam and per dish, whereas the signals going into the second process must be organised in streams of the same frequency per beam for all dishes. Cross connect has to be achieved with data switches outside of the processor due to huge data size. As such processing has to be broken into 2 separate processors.
Channelization Processor
o The splitting into finer channels per stream of signal can be processed separately from other streams but all streams have to be coordinated. The Amdahl limit is 100% meaning that parallel computing is essential. However, the AI index of this process is very low and is about 5 FLOPS per Byte per second. Owing to the large data transfer rate, the process has to be handled by 250 GPU nodes assuming PCIev4 (31.5GB/s) is the memory transfer bottleneck and not external data transfer.
Cross Correlation Processor
o The Amdahl limit is 100% whereas the AI is 47 FLOPS per Byte per second and 219 GPU nodes are required based on PCIev4.
Nvidia Tesla Volta
o Conservatively Tesla Volta has an AI of about 280. This means both processes will not make good use of the processing capacity of Volta.
END
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June 2013 |

Specifications
CPU
Single Intel® Xeon® processor E3-1200 v3 and 4th Gen Core i3, Pentium, Celeron processor in an LGA 1150 socket.
Memory
4x 240-pin DDR3 DIMM sockets
Supports up to 32 GB DDR3 ECC Un-Buffered memory (UDIMM)
Chipset
Intel® C224 Express PCH
Expansion Slots
1x PCI-E 3.0 x8 (in x16) slot
1x PCI-E 3.0 x8 slot
1x PCI-E 2.0 x4 (in x8) slot
Integrated Graphics
BMC integrated Aspeed AST2400
Network Controllers
Intel® i217LM + Intel® i210AT Controllers
Supports 10BASE-T, 100BASE-TX, and 1000BASE-T, RJ45 output
1x Realtek RTL8201N PHY (dedicated IPMI)
SATA
SATA3 (6Gbps) w/ RAID 0, 1, 10, 5
SATA2 (3Gbps) w/ RAID 0, 1
IPMI
Support for Intelligent Platform Management Interface v.2.0
IPMI 2.0 with virtual media over LAN and KVM-over-LAN support
Aspeed AST2400 with 10/100/1000M bps MAC
Serial ATA
4x SATA3 (6Gbps) ports
2x SATA2 (3Gbps) ports
LAN
2x Gigabit Ethernet LAN ports
1x RJ45 Dedicated IPMI LAN port
USB
4x USB 3.0 ports (1 Type-A, 2+1 via header)
6x USB 2.0 ports (4 rear, 2 via header)
VGA
1x VGA D-Sub Connector
Serial Port / Header
2x COM ports (1 rear, 1 header)
DOM
SATA DOM (Disk on Module) power connector support
TPM
1x TPM 1.2 20-pin Header
Form Factor
uATX
Dimensions
9.6" x 9.6", (24.4cm x 24.4 cm)
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