| ISA Architecture- CISC versus RISC Debate |
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| March 2013 | ||||
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This note is the first attempt to record the fundamentals of computer architecture for customer reference and training. This note focuses on a decade long of debate- which architecture is better, CISC or RISC. What are they? o Both are Instruction Set Architectures for computers (ISA). They are also in the category of Von Neumann Architecture which has been the de facto architecture since 1945 when the first electronic computer ENIAC was built. o Von Neumann Architecture refers to the arrangement of the central processor taking instructions and data from and to memory storage hardware via a connection. There are some incidences of computers which separated instructions and data to 2 different connections or had no connections at all but they are by far the minority. o Some computers are not ISA based. They do not have predefined instruction sets. The compiler has direct control of the computer hardware. This category is not common. o RISC has a set of fixed length instructions whereas CISC has instructions of variable lengths in order to cater for specific computing scenarios. Despite this difference, both architectures can have SIMD extensions. SIMD = Single Instruction Multiple Data. o Intel and AMD CPU are CISC. Arm and Power PC are RISC. (hover mouse over to enlarge images)
Which is better? o A paper presented in IEEE International Symposium on High Performance Computer Architecture HPCA 2013 provides the following information. The paper title is “Power Struggles: Revisiting the RISC vs CISC Debate on Contemporary ARM and x86 Architectures”. Authors were from the University of Wisconsin. o The performance of a CPU depends on ISA issues as well as ISA-independent issues. Independent issues are semiconductor circuit width (such as 22nm or 34nm), memory bandwidth, operating system, compiler, and workload type. These independent factors were excluded in order to benchmark RISC and CISC. o The paper chose Intel Core i7-2700, Intel Atom N450, ARM Cortex A8 and ARM Cortex A9 for benchmarking. The workloads chosen for benchmarking included mobile clients, desktop applications, web server, and database server. The paper concluded that the processors were designed to perform at different levels and they consumed powers on a cubic curve (power in Watt consumed went up to the cube of performance in Billion Instructions per Second) irrespective of their RISC or CISC architecture. END |
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